The present invention generally relates to a channel selecting apparatus for use in a case where a modulation signal having a continuous phase such as an AM modulation signal, an FM modulation signal, an MSK modulation signal and so on and a digital modulation signal exist at the same time in different frequency areas or different channels, and more particularly, to a channel selecting apparatus for stabilizing a frequency of a digital modulation signal inputted to a digital demodulator in accordance with frequency information to be obtained during at a demodulating process after selecting a channel in which a modulation signal having a continuous phase exists.
At present an FM modulation system is generally used for satellite broadcasting. Satellite digital audio broadcasting by an MSK modulation system has also been realized. Recently, digital satellite broadcasting by a QPSK digital modulation system have also been examined. In the future, satellite broadcasting where an FM modulation system is mixed with a digital modulation system will be considered.
At present, an AM modulation system is used for a modulation system in terrestrial broadcasting. Recently, digital terrestrial broadcasting by a digital multi-level QAM modulation system have also been examined.
Generally a synchronous detection method is used for demodulating digitally modulated signals. In the synchronous detection method, a PLL circuit is required for obtaining reproduced carriers synchronized in phase with the carriers of the digitally modulated signals. In order to improve the performance of the digital demodulating circuit, the frequency pull-in range of the PLL circuit is set so as to be narrow.
It is necessary to stabilize the center frequency of the digital modulation signal inputted into the digital demodulating circuit so that it may stay within the frequency pull-in range of the PLL circuit during the carrier reproduction.
In the satellite broadcasting receiver, a local oscillation frequency of the BS converter may drift by several MHz. A method of compulsorily sweeping an oscillation frequency of a VCO by a frequency sweeping circuit for carrier synchronization provided for a voltage control oscillator (hereinafter referred to as a VCO) when the digital modulation signal is converted in frequency into an intermediate frequency signal (hereinafter referred to as an IF signal) is used as a for the frequency-drift compensating means.
Even in the digital demodulation system, there is a big difference in a method of compensating for the frequency drift of the modulation signal between a digital demodulation system where a QPSK modulation signal or the like having a discontinuous phase is inputted and in a digital demodulation system where an MSK modulation signal or the like having a continuous phase is inputted. In an MSK modulation signal or the like having a continuous phase, a so-called mean value AFC method can be adapted, and the compensation of the frequency drift of the modulation signal is easier to effect. In the QPSK modulation signal, the mean value AFC method cannot be adapted since the phase of the modulation signal is not continuous. In the QPSK demodulation system, the oscillation frequency of the VCO is swept by the frequency sweeping circuit for carrier synchronization provided for a VCO and also, the sweeping frequency range also must be widely set so as to compensate for the local oscillation frequency drift of the BS converter. FIG. 13 shows a channel selecting circuit for conventional digital modulation signal use.
In FIG. 13, a frequency conversion circuit 121 frequency converts the digital modulation signal into an IF signal. The IF signal is transmitted to a digital demodulation circuit 122 and is demodulated, and a digital demodulation signal is outputted. The digital demodulation circuit 122 includes a carrier reproducing circuit 22 for reproducing the carrier.
A channel selection circuit 120 includes a VCO 123, a variable frequency divider 124, a reference oscillator 125, a phase comparator 126, a loop filter 127, and a microprocessor 128. As the VCO 123 is varied in oscillation frequency by a control signal output from the microprocessor 128, the oscillation frequency is widely tuned by channel selecting information inputted to the microprocessor 128 and the local oscillation signal of the VCO 123 is inputted in the frequency conversion circuit 121 and the variable frequency divider 124. The variable frequency divider 124 divides the local oscillation frequency with a frequency dividing ratio set by the microprocessor 128. The output signal of the variable frequency divider 124 is input to the phase comparator 126. The phase comparator 126 compares the phase of the output signal of the variable frequency divider 124 and the phase of the reference oscillator 125 so as to output a phase error signal. The phase error signal is smoothed by a loop filter 127 and is used as a control voltage for controlling the oscillation frequency.
The microprocessor 128 varies the frequency dividing ratio of the variable frequency divider 124 with a frequency dividing ratio set in accordance with the channel selecting information provided as the center frequency dividing ratio so as to sweep the oscillation frequency of the VCO 123 at a predetermined frequency step size. When the carrier frequency of the IF signal approaches an optimum frequency of the carrier reproducing circuit 22 and the carrier is reproduced in synchronism the carrier frequency of the IF signal, the synchronizing detection signal is outputted to the microprocessor 128 from the digital demodulating circuit 122 so as to suspend the variation of the frequency dividing ratio of the variable frequency divider 124.
When the frequency drift of the IF signal inputted to the digital demodulating circuit 122 is large in the above described conventional channel selecting circuit, the frequency sweeping range of the VCO 123 within the channel selecting circuit 120 has to be wider in order that the frequency of the IF signal be within the synchronizing pull-in range of the digital demodulating circuit 122. Consequently, the sweeping time becomes longer and the time to achieve synchronization becomes longer. Since the synchronization acquisition operation is performed from the beginning for each of the channel selecting operations, a problem arises in that the channel tuning time for the access time to synchronization after the channel selecting operation takes a long time.